Frequency synthesizers are commonly used to generate radio frequency (RF) signals for use in communication systems. A common form of frequency synthesizer is the charge pump based phase-locked loop (PLL).
Modern communication systems, such as the Global System for Mobile Communication (GSM) cellular telephone system, impose strict requirements on the locktime and noise performance of the transmitted signal, and on the signals used for mixing in the receiver. For example, the transmit locktime must typically be under 250 μs to settle the frequency synthesizer output frequency to under 100 Hz error, the transmitted phase noise must be under −113 dBc/Hz at 400 kHz offset, and the phase error of the transmitted signal must remain small (under 5 degrees root-mean-square in the GSM system). If the loop bandwidth of the PLL is too wide, the noise performance specification may not be met, and if the loop bandwidth is too narrow, the locktime specification may not be met. Further, variations in loop gain and bandwidth can degrade the performance of fractional-N frequency synthesizer based transmit systems in which a predistortion filter is used to compensate for the rolloff of frequency response of the PLL.
Variations in the gain and bandwidth of the PLL are due to variations inherent to transistor, resistor, and capacitor devices in low cost semiconductor processes. One such variation is the capacitance versus voltage characteristic of capacitors in the loop filter of the PLL. The variation of the capacitors in the loop filter with respect to voltage leads to variations in the loop bandwidth and gain, thereby degrading the locktime, noise, and phase error of the frequency synthesizer.
Thus, there remains a need for a calibration system to cancel out the undesirable process and environmental variations that degrade the performance of integrated frequency synthesizers while providing a desired, arbitrary level of accuracy with minimal overhead in terms of device area and calibration time. Ideally this calibration system should function automatically, with little or no user intervention, and the calibration should complete rapidly enough to be performed each time the frequency synthesizer is enabled.
One such system is disclosed in commonly owned U.S. patent application Ser. No. 10/409,291 filed Apr. 8, 2003, which is incorporated herein by reference in its entirety. The present invention relates to improving this system by compensating for the voltage non-linearity of the capacitors in the loop filter, thereby improving the performance of the frequency synthesizer.